Tcl Scripting, Routing, Python, floorplanning, Layout violation resolution, Physical Verification, EM closure, Cadence Innovus, Synopsys Fusion Compiler, Physical design flows, Signal integrity analysis, Dfm, Timing Closure, Placement, Clock Tree Synthesis

Ant, UNIX, Linux, Perl, Python, Tcl, LPE, Calibre ICV, LVS, Esd, ERC, C-shell, DRC

PostgreSQL, Dynamodb, Kafka, Node.js, Redis, Sql, Angular, Rabbitmq, React, MS SQL, Gcp, MySQL, MongoDB, Azure, Python, AWS

Tcl, Verilog, Python, Perl, Computer Architecture, Cadence Innovus, EDA Tools, digital logic, Physical Design, Methodology

Nvme, Pcie, Continuous Integration, test automation, Python Programming, Agile Development, GIT development flow, SSD firmware testing, automated build

Java, Golang, Cassandra, Bash, HBase, Redis, Terraform, Kubernetes, Python, Airflow, Step Functions, GitOps, Cadence, Temporal, ArgoCD

Test Methodology, Silicon Validation, yield analysis, Dft, silicon process fundamentals, manufacturing debug, Advantest 93K, Smart Scale, ATE test development, DFM concepts, Teradyne UFLEX testers

USB type C Power Delivery, Test scripts development in Python or other Programming languages, FPGA development with RTL design, Digital and analog circuit design, USB3.2 SuperSpeed, Microprocessor system architecture and development

Matlab, Python, FD-SOI technologies, industrial testing, Cadence-Virtuoso, Digital Design, CMOS, millimetre-Wave architecture, Bi-CMOS, DFT test development, RF architecture, Analog Design