EDA Tools, SERDES, Mentor Graphics, Verification, Cadence, Analog Design, Synopsis

C, Makefile, Windows, Pcie, Verilog, System Verilog, Python, Linux, Perl, Ethernet, Systemc, IP level ASIC verification, acceleration HLS tools, UPI verification, ChatGPT, SERDES, UVM based verification frameworks, TLM, AI tools, MS-Copilot, UVM testbenches, automating workflows in a distributed compute environment, Co-Sim, Digital Design, simulation profile efficiency improvement, Analog Design, debugging firmware and RTL code using simulation tools

formal tools, EDA Tools, SERDES, Verification, Mentor Graphics, Cadence, Analog Design, Synopsis, functional verification tools

EDA Tools, 3nm node process, SERDES, Verification, Analog Design, Circuit Design

power integrity , Matlab, Python, AMS tools, Electrical modeling, High-speed digital signaling interfaces, Signal Integrity, Pcb Design

Perl, Python, Tcl, flow automation, EDA Tools, Cadence Virtuoso