Arm, Python, simd, Vector Processing, ansi c, GCC-like toolchains, proprietary RTOS, processor architecture knowledge, RISC-V, GNU Linux, FPGA debugging, Isa, bare-metal design, symmetric multiprocessing, custom instructions, cache architecture

JIRA, Git, Confluence, Arm, Python, GNU Linux, FPGA debugging, GCC-like toolchains, SIMD Vector Processing, RISC-V, proprietary RTOS, CI CD, symmetric multiprocessing, cache architecture, processor architecture knowledge, Bare metal, Isa, custom instructions, ansi c, bare-metal design